Widgets
Social Links
Search
Download Android App
Physical Design Tutorials
Popular Posts
-
1. What is floorplaning? A. Floor planing is the process of placing Blocks/Macros in the chip/core area, thereby determining ...
-
What is IR Drop Analysis? How it effects the timing? The power supply in the chip is distributed uniformly through metal layers (Vdd a...
-
Congestion in VLSI Physical Design Flow Here let us discuss about congestion. What is Congestion? What are the reasons for Congestion? H... -
Clock Tree Synthesis Clock Tree Synthesis (CTS) is the process of inserting buffers/inverters along the clock paths of the ASIC design to... -
Static Timing Analysis Interview Questions Static Timing Analysis plays major role in physical design(PD) flow. It checks the design... -
IR Drop Analysis Interview Questions 1. What is IR Drop Analysis? A. The power supply in the chip is distributed uniformly through met... -
BLOCKAGES: Blockages are specific locations where placing of cells are prevented or blocked. These act as guidelines for placing std cel...
-
The following are the Control Parameters during Floorplan 1. Aspect Ratio: Core Utilization Aspect ratio (H/W) Row/Core ratio 2.W... -
Sanity Checks in Physical Design Flow check_library check_timing report_constraint report_timing report_qor check_design c...
-
IR Drop Analysis using Redhawk: Redhawk performs several types of power analysis on a circuit. Static Voltage (IR) drop with average c...
Blog Archive
Recent Posts
Definition List
Pages
Total Pageviews
Download mobile app on Play Store
Physical Design Tutorials
Follow by Email
Contributors
+1
Follow us on Twitter Now
Search This Blog
Subscribe To
Posts
All Comments